Dr. Subal Sahni
Vice President of Technology
Biography
Subal Sahni is Vice President of Technology at Marvell Technology. He joined Marvell through the acquisition of Celestial AI, where, as Vice President of Photonics, he built and led the team responsible for all aspects of photonic integrated circuit (PIC) development, including light sources, fiber interfaces, and optical packaging.
Previously, Subal held senior technical and management roles at Cisco Systems and Luxtera Inc. At Luxtera, he was a seminal member of the technology team that enabled the industry’s first high-volume silicon photonics products for optical transceivers.
Subal has more than 20 years of experience in the development and productization of integrated optics and brings a deep understanding of every phase of the engineering lifecycle, from design through high-volume manufacturing. He has delivered numerous invited talks and published extensively in the field of silicon photonic integration, and he holds more than 30 patents spanning technology and product development.
Subal received his B.Tech. degree in Engineering Physics from the Indian Institute of Technology Bombay, India, and his M.S. and Ph.D. degrees in Electrical Engineering from the University of California, Los Angeles.
Company Profile
We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, We go all in with you.
Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.
Mark Gerber
Group Director, IC Packaging Product
Biography
Mark is currently a Group Director of IC Packaging Product Management at Cadence Design Systems Inc. and is responsible for the IC Packaging related products. Prior to Cadence, Mark held leadership and technical positions at ASE, Texas Instruments, Motorola/NXP and Maxim Integrated/Dallas Semiconductor supporting industry areas including Mobile, Networking, Automotive and High-Performance Computing/AI. Mark is currently serving on the IMAPS (International Microelectronics and Packaging Society) executive committee as President Elect and has served as Vice President of Technology, Director of the IMAPS Academy for workforce development, and became an IMAPS Fellow in 2018. He holds a bachelor’s degree in mechanical engineering from Texas A&M University, has written +20 papers and holds 40 semiconductor packaging patents.
Company Profile
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics.
Suresh Jayaraman
Sr. Director Advanced Package & Technology Integration
Biography
Suresh joined Amkor in 2016 and currently leads Wafer Level Package and product development, as well as package technology integration. In this role, he partners closely with customers and internal R&D teams to advance High-Density Fan-Out (HDFO) and 2.5D technologies for CPO/XPU integration. He also develops wafer-level integration schemes that enhance the performance of RF front-end, digital, consumer, and high-performance computing products. Prior to joining Amkor, Suresh held senior engineering and product management roles at Deca Technologies. He has more than 25 years of experience in IC package design and manufacturing, including fcCSP, FCBGA, SiP, and Fine Pitch CuP products. Suresh holds a master’s degree in Industrial Engineering.
Company Profile
Amkor Technology, Inc. is the world’s largest US headquartered OSAT (outsourced semiconductor assembly and test). Since its founding in 1968, Amkor has pioneered the outsourcing of IC packaging and test services and is a strategic manufacturing partner for the world’s leading semiconductor companies, foundries, and electronics OEMs. Amkor provides turnkey services for the communication, automotive and industrial, computing, and consumer industries, including but not limited to smartphones, electric vehicles, data centers, artificial intelligence and wearables. Amkor’s operational base includes production facilities, product development centers and sales and support offices located in key electronics manufacturing regions in Asia, Europe and the United States. Learn more at https://amkor.com
John Guzek
VP Substrate and Advanced Packaging Technology Development
Biography
John Guzek is a technical leader with over three decades of experience in semiconductor advanced packaging technology development, the majority in the area of substrate technology. He has been at the forefront of major substrate and packaging innovations including C4 assembly, organic flip chip, patch on interposer, coreless substrate, glass core substrate, fan-out panel-level packaging, and EMIB. He was instrumental in establishing Intel’s first internal substrate research and development factory. Currently, John leads Boise site operations for Micron’s Advanced Packaging TD organization which includes management of a $300M+ pilot line and >100 team members. John’s organization is focused on the development of next generation HBM and other heterogenous integration architectures. John holds over 50 patents in the field of packaging and graduated from the Massachusetts Institute of Technology with BS and MS degrees in Materials Science and Engineering.
Company Profile
Micron is a world leader in innovative memory solutions that transform how the world uses information. For over 40 years, our company has been instrumental to the world’s most significant technology advancements, delivering optimal memory and storage systems for a broad range of applications.
Dr. In Dong Kim
VP of DRAM Product Planning & Business Enabling
Biography
In Dong Kim is Vice President of DRAM Product Planning and Business Enabling, responsible for validation and design-win for Samsung’s DRAM products including DDR5 and HBM for key US customers.
Since he began his career as a process integration engineer in 2003, In Dong has successfully managed multiple roles at Samsung and has worked extensively with major customers in Server/PC, Mobile and other applications to enable Samsung’s latest DRAM & NAND products.
In Dong holds Ph.D. degree in Electrical and Computer Engineering from North Carolina State University.
Company Profile
Samsung Electronics Co., Ltd. engages in the manufacturing and selling of electronics and computer peripherals. The company operates through following business divisions: Consumer Electronics, Information Technology & Mobile Communications and Device Solutions. The Consumer Electronics business division provides cable television, monitor, printer, air-conditioners, refrigerators, washing machines and medical devices. The Information Technology & Mobile Communications business division offers handheld products, communication systems, computers and digital cameras. The Device Solutions business division comprises of memory, system large scale integrated circuit and foundry. The company was founded on January 13, 1969 and is headquartered in Suwon, South Korea.
Geeta Athalye
VP Silicon Photonics Test
Biography
Geeta Athalye is the VP of Silicon Photonics Test at Teradyne, where she leads the development of test equipment for Silicon Photonics devices—key enablers for the data centers powering AI. With 25 years of experience in product development and management, business development, and strategy, Geeta has established a strong track record in test equipment technology for emerging markets and strategic customers.
Throughout her tenure at Teradyne, Geeta has held multiple leadership roles within the semiconductor, memory, and storage test business units, spanning both engineering and marketing. She holds an MS in Electrical Engineering from The Ohio State University and an MBA from Babson College.
Company Profile
Teradyne designs, develops, and manufactures automated test equipment and advanced robotics systems. Its test solutions for semiconductors and electronics products enable Teradyne’s customers to consistently deliver on their quality standards. Its advanced robotics business includes collaborative robots and mobile robots that support manufacturing and warehouse operations for companies of all sizes.
Teradyne delivers manufacturing automation across industries, applications and the world. Teradyne solves complex test and automation challenges and enables businesses to achieve higher production volumes, higher quality and higher ROI. Teradyne designs, develops, and manufactures automatic test equipment used to test semiconductors, wireless products, data storage and complex electronics systems in a number of industries, including consumer electronics, wireless, automotive, industrial, computing, communications, and aerospace and defense. The industrial automation portfolio includes collaborative robotic arms, autonomous mobile robots (“AMRs”) and advanced robotic control software used by global manufacturing, logistics and industrial customers to improve quality, increase manufacturing and material handling efficiency, and decrease manufacturing and logistics costs. The automatic test equipment products include:
- Semiconductor test systems
- Storage and system-level test systems; Defense and aerospace test instrumentation and systems; Circuit-board test and inspection systems
- Wireless test systems
Dr. Ravi Agarwal
Director of Advanced Technology Development
Biography
Ravi Agarwal is an accomplished professional with extensive experience in advanced technology development and research. Currently serving as Director of Advanced Technology Development R&D at Meta since October 2019, Ravi specializes in AI/ML chip co-design, chiplet strategy, and advanced packaging architecture. Previous leadership roles include Chair of EPS – IEEE Electronics Packaging Society, ODSA Chiplet Business Working Group Lead at Open Compute Project Foundation, and Director of Strategy at Intel Corporation. Ravi’s background includes significant contributions in product management, supply chain strategy, and research assistant roles across various institutions, including North Carolina State University and the Indian Institute of Science. Ravi holds a PhD in Materials Science and Engineering, an MBA from the University of California, Berkeley, and multiple degrees in related fields, demonstrating a strong foundation in both technical and business disciplines.
Company Profile
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology.
Subramanian Iyer
Distinguished Professor and Charles Reames Endowed Chair, Samueli School of Engineering
Biography
Subramanian S. Iyer is a Distinguished Professor at the UCLA Samueli School of Engineering, holding the Charles P. Reames Endowed Chair in Electrical Engineering. He directs the Center for Heterogeneous Integration and Performance Scaling (CHIPS) at UCLA. Before joining UCLA in 2015, he was an IBM Fellow with over 30 years of experience in semiconductor technology, including pioneering work on silicon germanium transistors and 3D integration. His research focuses on advanced packaging, heterogeneous integration, and computing technologies. He is a National Academy of Inventors Fellow and an IEEE Daniel Noble Award recipient, among other honors. In 2023, he was appointed director of the National Advanced Packaging Manufacturing Program (NAPMP).
Company Profile
As a public research university, our mission revolves around the creation, dissemination, preservation and application of knowledge for the advancement of global society. UCLA combines the close-knit, engaging atmosphere of a spirited public institution with the expansive opportunities found in a world-class city. Located in the picturesque Westwood neighborhood, just minutes from Hollywood and downtown Los Angeles, UCLA offers a comprehensive environment that supports academic and personal growth. The university’s setting provides students with access to a rich cultural landscape and a range of professional and recreational activities that enhance their educational experience.
Jason Conrad
Chief Operating Officer for Semiconductor Research
Biography
Jason Conrad is the Chief Operating Officer for Semiconductor Research at ASU. He leads SWAP Hub, SHIELD USA, and MacroTechnology Works, ASU’s premier facility for semiconductor research and development. Jason brings with him more than 23 years of experience in the semiconductor industry. With previous roles at industry-leading companies such as NXP, Global Wafers, and Lam Research, Jason is a proven leader focused on performance and quality.
Jason’s mission is to foster relationships with academic, industry and government partners to not only develop leap ahead technologies but also the workforce of the future.
Jason holds a bachelor’s degree in chemical engineering from the University of Notre Dame.
Company Profile
With 110,000+ undergraduate students, 30,000+ graduate and professional students, and 5,000+ faculty, Arizona State University (ASU) exemplifies a new prototype for the American public research university. At ASU, our culture of innovation and inclusion draws pioneering researchers to our faculty and attracts highly qualified students from all 50 states and more than 130 nations. ASU is expanding academic and entrepreneurial opportunities for every type of learner at all stages of life. Creating a resilient microelectronics innovation ecosystem is critical to America’s security and economic competitiveness. Arizona State University is responding to this need by working with industry and government partners to reestablish America’s capacity for domestic microelectronics and semiconductor manufacturing and innovation. ASU offers traditional degree programs and rapid, low-cost options for upskilling and re-skilling of the existing semiconductor workforce, as well as workers from outside the industry.
ASU is building the semiconductor talent pipeline and mobilizing the expertise and capabilities of the Fulton Schools of Engineering to drive research, development and innovation. The Fulton Schools of Engineering at Arizona State University is the largest and most comprehensive engineering school in the nation, offering 25 undergraduate degree programs, and 48 graduate degree programs. With over 30,000 students within the Fulton Schools of Engineering, 7000+ students studying microelectronics-related fields, and 150+ faculty engaged in microelectronics research and teaching. We offer extensive research facilities including our research in semiconductor manufacturing and advanced semiconductor packaging which is supported by our extensive lads which includes MacroTechnology Works with 250,000 total sq ft capacity, 43,000 sq ft clean rooms, and 23,00 sq ft wet/dry labs. We also offer graduate programs in semiconductor manufacturing, packaging, and assembly as well as certificate programs to support workforce development.
Mark Kuemerle
VP of Technology Custom Cloud Solutions
Biography
Mark Kuemerle is Vice President, Technology, Custom Cloud Solutions at Marvell. In this role, Mark is responsible for defining leading-edge ASIC offerings, drives product competitiveness, and architects system-level solutions. Before joining Marvell, Mark was a Fellow in Integrated Systems Architecture at GLOBALFOUNDRIES and has held multiple engineering positions at IBM.
He has authored numerous articles on die-to-die connectivity and multichip systems and holds multiple patents related to low-power technologies and package integration. Mark earned a Bachelors and Master of Science in Computer Engineering from Case Western Reserve University.
Company Profile
We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, We go all in with you.
Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.
Ritesh Jain
SVP, Engineering & Operations
Biography
Ritesh Jain is Senior Vice President, Engineering & Operations at Lightmatter leading cross-functional engineering organizations responsible for driving innovation and delivering products. Previously as VP at Intel, Ritesh led hardware development for data centers. He holds a master’s in semiconductor packaging and during the two plus decades of experience in the semiconductor industry, he drove several generations of data center products into high volume deployments while driving major technology transitions and leading global engineering teams.
Company Profile
Lightmatter is leading the revolution in AI data center infrastructure and enabling the next giant leaps in human progress. The company was founded in 2017 out of MIT, with two of its co-founders – CEO Nick Harris, Ph.D. and Chief Scientist Darius Bunandar, Ph.D. – renowned as preeminent scientists in the field. Lightmatter has raised $850 million in funding by leading investors including Fidelity, Google Ventures, Sequoia, Spark, T Rowe Price, and Viking, and was most recently valued at $4.4 billion. Initially founded in Boston, Lightmatter moved its headquarters to Mountain View in 2023. It currently employs 230 employees across its headquarters in Silicon Valley, as well as offices in Boston, Toronto, Oregon and Arizona.
The company’s groundbreaking Passage™ platform—the world’s first 3D-stacked silicon photonics engine—connects thousands to millions of processors at the speed of light. Designed to eliminate critical data bottlenecks, Lightmatter’s technology enables unparalleled efficiency and scalability for the most advanced AI and high-performance computing workloads, pushing the boundaries of AI infrastructure.
Philip Martin
VP & Director Sort/Test Technology Development
Biography
Phil Martin is Vice President and Director of Sort/Test Technology Development for Intel Foundry. His responsibilities encompass test technology development across wafer, die, and package test, including the Intel High Density Modular Tester platform (HDMT). With over 30 years of experience at Intel, Phil has held multiple positions, all within test technology development. He holds a Masters of Science degree in Mechanical Engineering from the University of Idaho.
Company Profile
Intel’s systems foundry approach offers full-stack optimization from the factory network to software. Intel and its ecosystem empower customers to innovate across the entire system through continuous technology improvements, reference designs and new standards. Intel Foundry is an independent foundry business that meets our customers’ unique product needs, including our industry-leading sort and test capabilities. Whether front-end or back-end design is needed, when integrated with our foundry co-optimized development kits based on industry-standard tools and flows and powerful silicon IPs, the result is true innovation.
Roy Chorev
Vice President and General Manager, Compute Test Division
Biography
Roy Chorev is the vice president of product development for the semiconductor test division at Teradyne, where he is responsible for product development for Teradyne’s semiconductor test products. With more than twenty years of experience in the automated test equipment industry, he has held a number of roles in software development, systems engineering and product marketing at Teradyne. Roy holds a Bachelor of Arts in computer science from McGill University and Master of Business Administration from Babson College.
Company Profile
Teradyne designs, develops, and manufactures automated test equipment and advanced robotics systems. Its test solutions for semiconductors and electronics products enable Teradyne’s customers to consistently deliver on their quality standards. Its advanced robotics business includes collaborative robots and mobile robots that support manufacturing and warehouse operations for companies of all sizes.
Teradyne delivers manufacturing automation across industries, applications and the world. Teradyne solves complex test and automation challenges and enables businesses to achieve higher production volumes, higher quality and higher ROI. Teradyne designs, develops, and manufactures automatic test equipment used to test semiconductors, wireless products, data storage and complex electronics systems in a number of industries, including consumer electronics, wireless, automotive, industrial, computing, communications, and aerospace and defense. The industrial automation portfolio includes collaborative robotic arms, autonomous mobile robots (“AMRs”) and advanced robotic control software used by global manufacturing, logistics and industrial customers to improve quality, increase manufacturing and material handling efficiency, and decrease manufacturing and logistics costs. The automatic test equipment products include:
- Semiconductor test systems
- Storage and system-level test systems; Defense and aerospace test instrumentation and systems; Circuit-board test and inspection systems
- Wireless test systems
Kevin Soukup
SVP/GM Silicon Photonics
Biography
Kevin Soukup is Senior Vice President of Silicon Photonics Product Line at GF, a position he was appointed to in 2024. In this role, Mr. Soukup leads the company’s Silicon Photonics business that enables customers to transport enormous volumes of data through high-speed, power efficient electro-optical systems.
Prior to his current role, he served as Chief Strategy Officer developing the company’s integrated strategy and ensuring that GF has the management systems in place to deliver. Mr. Soukup joined GF in 2011 and held positions of increasing responsibility in technology development and manufacturing operations for the next seven years. In 2018, Kevin transitioned to VP of Business Transformation and helped prepare GF for IPO in 2021.
Before his career with GF, Mr. Soukup spent eleven years with Samsung Electronics’ semiconductor unit in engineering and operations management positions.
Mr. Soukup holds a Bachelor of Science in Chemical Engineering from the University of Florida. He currently serves as a member of the board of directors of VueReal.
Company Profile
GF is one of the world’s leading semiconductor manufacturers and the only one with a truly global footprint. We are redefining innovation and semiconductor manufacturing by developing feature-rich process technology solutions that provide leadership performance in pervasive high growth markets. As a steadfast partner, with a unique mix of design, development and fabrication services, GF works collaboratively alongside our customers to bring a broad range of innovative products to market. With a global customer base, a talented and diverse workforce and an at-scale manufacturing footprint spanning three continents, GF is delivering a new era of more.
Dr. Jaesik Lee
VP Package Engineering
Biography
Dr. Jaesik Lee is Vice President of Package Engineering at SK hynix America. In this role, Jaesik is responsible for the research and development of advanced packaging for next generation High Bandwidth Memory (HBM) and pathfinding initiatives which enrich SK hynix’s innovations. He also focuses on the collaborations with customers to overcome HBM challenges associated with System in Packages (SIPs).
Prior to joining SK hynix America, Jaesik has held various key technical positions through Meta, Google, Nvidia, and Qualcomm where he drove advanced packaging technology developments, Packaging and System Co-optimization, and Manufacturing in Mobile, AI, and HPC applications. He received a PhD in mechanical engineering from University of Waterloo.
Company Profile
An AI First Mover Leading the Global AI Memory Era
With our global technology leadership, SK hynix aims to provide greater value to all stakeholders, including our customers, partner companies, investors, local communities, and employees.
Moreover, we are working to strengthen our ESG management to create even more value, by moving away from the conventional business model of seeking only economic benefits, in pursuit of more social value and a healthier governance structure.
SK hynix will grow into a Full Stack AI Memory Provider, offering customized solutions tailored to the diverse needs of global customers, covering both DRAM and NAND flash, in the era of full-scale AI.
Dr. Near Margalit
VP & GM
Biography
Dr. Near Margalit has held several executive positions in the optical connectivety industry. He founded Zaffire Inc., a metro DWDM Optical Networking company before moving on to lead Source Photonics as CEO from 2002-2013, growing the company to one of the premier optical transceiver vendors. He was the CTO and Head of Product Development for Intel’s Silicon Photonics for the commercial introduction of Silicon Photonics in 2015-2016. From 2018 to present he has been with the Optical Systems Division of Broadcom where he is currently the VP and General Manager of the division. He holds a Ph.D in Optoelectronics from UC Santa Barbara and a B.S. in Applied Physics from CalTech.
Company Profile
Broadcom Inc. designs, develops, and markets digital and analog semiconductors. The Company offers wireless RF components, storage adapters, controllers, networking processors, switches, fiber optic modules, motion control encoders, and optical sensors. Broadcom markets its products worldwide.
Sriram Srinivasan
Partner and General Manager, Silicon Manufacturing and Packaging Engineering
Biography
Sriram Srinivasan is a Partner and General Manager in Silicon Manufacturing and Packaging Engineering at Microsoft, within the Azure Hardware team. Their team is responsible for overseeing the entire process of Silicon Manufacturing, Packaging/Test technologies, Signal/Power Integrity, Power Delivery Technologies, and ensuring the Quality and Reliability of Microsoft Azure and custom products. Prior to joining Microsoft, Sriram spent 21 years at Intel Corporation, where he focused on Advanced Packaging, Package Architecture, and technology pathfinding. His primary interest lies in Manufacturing and Package architecture and technology definition, particularly in silicon-package-platform co-design to create optimized product and technology solutions. Sriram holds a B.Tech from the University of Madras, India, and an M.S from the University of Kansas, Lawrence.
Company Profile
Microsoft is a technology company whose mission is to empower every person and every organization on the planet to achieve more. Founded in 1975, we develop and support software, services, devices, and solutions that deliver new value for customers and help people and businesses realize their full potential. We offer an array of services, including cloud-based solutions that provide customers with software, services, platforms, and content, and we provide solution support and consulting services. We also deliver relevant online advertising to a global audience.
Our products include operating systems, cross-device productivity and collaboration applications, server applications, business solution applications, desktop and server management tools, software development tools, and video games. We also design and sell devices, including PCs, tablets, gaming and entertainment consoles, other intelligent devices, and related accessories.
Dr. Rahul Manepalli
Intel Fellow & Vice President : Advanced Packaging Technology Development
Biography
Dr. Rahul Manepalli is an Intel Fellow, Vice President and Director of the Substrate & Wafer Assembly Technology Development organization in Intel. He currently leads the IC substrate technology development and 3DIC wafer assembly technology development teams in Intel’s Advanced Packaging Technology and Manufacturing Organization. He and his team are driving the pathfinding & development of materials, processes and equipment for the next generation of substrate, wafer level assembly technologies. His team has been the driving force behind many of the technology innovations in Intel’s Embedded Multi-die Interconnect Bridge (EMIB/EMIB-T), Panel ODI, Glass core substrate, Foveros (Solder and HBI die to wafer interconnect) technologies. Over his 25+ year career at Intel, Rahul has also held leadership roles in Intel’s assembly materials development and pathfinding teams leading to several innovations in encapsulants, thermal interface materials and solder alloys. Rahul is the author of over 250 patent publications in semiconductor packaging, over 50 technical papers and invited talks. He has a Ph.D. in Chemical Engineering from the Georgia Institute of Technology.
Company Profile
Intel (Nasdaq: INTC) is an industry leader, creating world-changing technology that enables global progress and enriches lives. Inspired by Moore’s Law, we continuously work to advance the design and manufacturing of semiconductors to help address our customers’ greatest challenges. By embedding intelligence in the cloud, network, edge and every kind of computing device, we unleash the potential of data to transform business and society for the better.
To learn more about Intel’s innovations, go to newsroom.intel.com and intel.com.
Robin Davis
Director of Business Development
Biography
Robin Davis is Director of Business Development at Syenta, where she leads U.S. customer engagement and industry partnerships focused on next-generation interconnect and advanced packaging technologies. She is an inventor on multiple issued and pending patents covering semiconductor packaging structures and manufacturing methods, including fan-out, panel-level processing, and advanced interconnect architectures. Prior to joining Syenta, she held senior roles in semiconductor packaging, working with Tier 1 fabless IC designers, foundries, OSATs, and research institutions across AI, HPC, RF, and defense applications.
Company Profile
Syenta has developed a breakthrough advanced packaging technology that addresses the critical AI memory bandwidth bottleneck by enabling high-resolution copper interconnects.
We are actively exploring strategic partnerships in the AI accelerator space to demonstrate how our technology can overcome existing chip design constraints and potentially increase chip bandwidth by up to 10x.
Dr. Akshay Singh
VP, Advanced Packaging Technology Development
Biography
Dr. Akshay Singh is vice president of Advanced Packaging Technology Development at Micron Technology. He leads a global team that is responsible for delivering advanced memory packaging solutions for HBM, high performance compute and AI/ML applications. Dr. Singh joined Micron in 2006 as an interposer materials engineer and since then has held number of positions of increasing responsibility in packaging design, integration and technology development. Prior to joining Micron, Dr. Singh held product development positions at Artificial Muscle, Inc. and USDA.
Dr. Singh has authored several keynote publications and patents and has served as an invited panel speaker at several conferences. Dr. Singh holds master’s and doctorate degrees in mechanical engineering from Louisiana State University, bachelor’s degree in mechanical engineering from Maharaja Sayajirao University and is a graduate of the Stanford Graduate School of Business Executive Program.
Education:
- Stanford Graduate School of Business Executive Program, Stanford University
- PhD and MS, Mechanical Engineering, Louisiana State University
- BE, Mechanical Engineering, Maharaja Sayajirao University
Company Profile
Micron is a world leader in innovative memory solutions that transform how the world uses information. For over 40 years, our company has been instrumental to the world’s most significant technology advancements, delivering optimal memory and storage systems for a broad range of applications.
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